发明名称 |
Two-bit semiconductor memory with enhanced carrier trapping |
摘要 |
A nonvolatile semiconductor memory comprises a pair of diffused layers formed in the surface area of a p-type silicon substrate, and a gate electrode (polysilicon film and tungsten silicide film formed on a gate oxide between the diffused layers over the p-type silicon substrate. Silicon nitride film is formed at both ends of the gate oxide so that the carrier trap characteristic may become high locally in areas near the pair of diffused layer. This configuration prevents carrier injection to other than the ends of the gate oxide, ensures reliable recording and storage, and increases reliability by preventing write and erase error.
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申请公布号 |
US6750520(B2) |
申请公布日期 |
2004.06.15 |
申请号 |
US20020085023 |
申请日期 |
2002.03.01 |
申请人 |
FUJITSU LIMITED |
发明人 |
KURIHARA HIDEO;IIJIMA MITSUTERU;ITANO KIYOSHI;CHIDA TETSUYA |
分类号 |
H01L21/8247;H01L21/28;H01L21/8246;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):H01L29/76 |
主分类号 |
H01L21/8247 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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