| 摘要 |
The present invention provides a DLL and a semiconductor integrated circuit device of reduced power consumption suited for use in equipment that complies with DDR-II specifications. It also provides a DLL and a semiconductor integrated circuit device in which the occurrence of hazards at the time of tap changeover is suppressed, thereby preventing a deviation in output timing as well as malfunction. In accordance with one aspect of the present invention, a delay-locked loop device is provided for adjusting delay times of serially connected first and second delay lines in such a manner that a signal obtained by delaying an input signal by the first and second delay lines is in phase with the input signal, thereby outputting, from the first delay line, a signal that is the result of delaying the input signal by one half cycle of the input signal.
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