| 摘要 |
A bit line selector switch is serially connected with a data sink for detecting high speed data transmissions, typically in the gigabit-per-second range, and a backplane having a plurality of data lines. The selector switch incorporates a selector circuit that operates in one of two modes, a first "selected", or ON, mode and a second "not selected", or OFF, mode. The selector circuit includes one, preferably differential, input. In one embodiment, a selector switch has a plurality of selector circuits thus allowing the switch to operate in both modes simultaneously. Data coupled to a differential input of the selector circuit will, when operating in the "selected" or ON mode, transmit the data to the data sink which be, for example, a memory device, processor, or the like. In the "not selected" or OFF mode, the selector circuit will pass any data received to a positive supply rail. Regardless of the mode of operation, the selector circuit presents to the coupled data lines an impedance which matches that of the data path coupling the selector circuit to the data line. The selector switch, which typically is comprised of four or less differential inputs, and thus a corresponding number of selector circuits, may be combined with other similar switches to form a multistage switch.
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