| 发明名称 |
Stacked gate electrode for a MOS transistor of a semiconductor device |
| 摘要 |
A semiconductor device with an MOS transistor gate electrode in a stacked structure comprising a silicon layer, a metal silicide layer, a reaction barrier layer such as a metal nitride layer and a metallic layer formed from the bottom upwards has an increased circuit performance owing to a gate resistance-reducing effect.
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| 申请公布号 |
US6750503(B2) |
申请公布日期 |
2004.06.15 |
| 申请号 |
US20010829969 |
申请日期 |
2001.04.11 |
| 申请人 |
RENESAS TECHNOLOGY CORP. |
发明人 |
OHNISHI KAZUHIRO;YAMAMOTO NAOKI |
| 分类号 |
H01L21/28;H01L21/762;H01L21/8238;H01L29/423;H01L29/43;H01L29/49;H01L29/78;(IPC1-7):H01L29/788 |
主分类号 |
H01L21/28 |
| 代理机构 |
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代理人 |
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| 主权项 |
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| 地址 |
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