发明名称 Methods and apparatuses to clear state for operation of a stack
摘要 Methods and apparatuses to clear state for operation of a stack. According to one embodiment of the invention, a processor comprises a set of one or more storage areas and a decode unit. The set of one or more storage areas are to store a plurality of tags and a top of stack indication, where each of the plurality of tags is to indicate if a register is in an empty or non-empty state. The decode unit is to decode scalar floating point instructions and packed data instructions, where at least certain of said scalar floating point instructions specify registers in a stack referenced manner and at least certain of said packed data instructions specify registers in a non-stack referenced manner. In addition, the packed data instructions include an instruction to mark the end of blocks of the packed data instructions in programs. The processor also comprises circuitry to cause the plurality of tags to indicate the empty state responsive to execution of the instruction.
申请公布号 US6751725(B2) 申请公布日期 2004.06.15
申请号 US20010785303 申请日期 2001.02.16
申请人 INTEL CORPORATION 发明人 BISTRY DAVID;MENNEMEIER LARRY;PELEG ALEXANDER D.;DULONG CAROLE;KOWASHI EIICHI;MITTAL MILLIND;EITAN BENNY
分类号 G06F9/30;(IPC1-7):G06F9/302;G06F9/44 主分类号 G06F9/30
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