发明名称 Method and apparatus for testing and debugging a circuit
摘要 A series of secondary or "shadow" storage elements are employed that duplicate, or "shadow", the information in a circuit's core logic shadowed functional registers. These shadow storage elements are then coupled to form a separate, independently-addressable shadow scan path. The information contained in the shadowed functional registers of a circuit is then shifted out via the shadow scan path without altering the shadowed functional registers using special commands issued from a JTAG controller.
申请公布号 US6751764(B1) 申请公布日期 2004.06.15
申请号 US20010909742 申请日期 2001.07.19
申请人 SUN MICROSYSTEMS, INC. 发明人 GOLSHAN FARIDEH;VISHWANTHAIAH SAI
分类号 G01R31/317;G01R31/3185;(IPC1-7):G01R31/28 主分类号 G01R31/317
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