发明名称 Clock synchronized non-volatile memory device
摘要 A nonvolatile memory apparatus which includes a plurality of terminals including clock, command and other terminals, a control circuit, and a plurality of nonvolatile memory cells. The clock terminal receives a clock signal. The command terminal receives commands including read and program commands. The control circuit reads out operation steps from a program memory for controlling operation of said apparatus by executing the operation steps. In response to a read command, the control circuit controls reading data from the nonvolatile memory cells, and outputting data via the other terminal not the command terminal based on the clock signal. In response to a program command, the control circuit controls receiving data via the other terminal not the command terminal based on the clock signal, and writing data to the nonvolatile memory cells.
申请公布号 US6751119(B2) 申请公布日期 2004.06.15
申请号 US20030373709 申请日期 2003.02.27
申请人 RENESAS TECHNOLOGY CORP. 发明人 MIWA HITOSHI;KOTANI HIROAKI
分类号 G11C11/56;(IPC1-7):G11C11/34 主分类号 G11C11/56
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