发明名称 |
Semiconductor memory device |
摘要 |
A semiconductor memory device includes: a memory cell configured with two transistors and one capacitor; two word drivers for controlling two word lines alternately, the two word lines controlling reading/writing with respect to the memory cell; two address latch circuits for latching a first address signal to select one of the word drivers, the two address latch circuits being respectively provided upstream from the two word drivers; and an address decoder for decoding a second address signal to generate the first address signal. In this device, the address decoder supplies the first address signal in common to both of the two address latch circuits.
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申请公布号 |
US6751154(B2) |
申请公布日期 |
2004.06.15 |
申请号 |
US20030400043 |
申请日期 |
2003.03.26 |
申请人 |
MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. |
发明人 |
KURODA NAOKI |
分类号 |
G11C11/408;G11C7/10;G11C7/22;G11C8/06;G11C8/16;G11C8/18;G11C11/405;G11C11/4076;(IPC1-7):G11C7/00 |
主分类号 |
G11C11/408 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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