发明名称 SEU HARD MAJORITY VOTER FOR TRIPLE REDUNDANCY
摘要 <p>Majority voting between triple redundant integrated circuits is used in order to provide an SEU hardened output signal. Accordingly, an input signal is processed in a predetermined manner to provide a first signal, the input signal is processed in the same manner to provide a second signal, and the input signal is also processed in the same manner to provide a third signal. A majority vote is taken between the first, second, and third signals by an SEU immune majority voter circuit, and an output signal is provided corresponding to the majority vote.</p>
申请公布号 WO2004049572(A1) 申请公布日期 2004.06.10
申请号 WO2003US40048 申请日期 2003.11.20
申请人 HONEYWELL INTERNATIONAL INC. 发明人 FULKERSON, DAVID, E.
分类号 G11C5/00;H03K19/23;(IPC1-7):H03K19/003 主分类号 G11C5/00
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