| 摘要 |
<P>PROBLEM TO BE SOLVED: To cut down, by reducing interconnection resistances of power feed line against a light emitting element, a variation in light intensity of each light emitting element within a chip that has been generated by the influence of the power feed line. <P>SOLUTION: Positions of bonding pads 54, 55 of a ϕ<SB>I</SB>line 14 and ϕ<SB>A</SB>line 15 are arranged in both ends of the chip that sandwiches a light emitting element array. Thus made up configuration makes an interconnection line length leading from the bonding pad 54 for ϕ<SB>I</SB>to that 55 for ϕ<SB>A</SB>equal to all light emitting element, so that equalization of emitted light intensity can be realized. <P>COPYRIGHT: (C)2004,JPO |
