PLANARIZATION METHOD OF INTER LAYER DIELECTRIC OF SEMICONDUCTOR DEVICE

摘要

PURPOSE: A planarization method of an inter layer dielectric of a semiconductor device is provided to be capable of simplifying a planarization process by using a spin coating method and reducing heat budgets as a reflow process is carried out. CONSTITUTION: A cell region is formed in a semiconductor substrate for forming a semiconductor memory. A storage poly and plate poly are formed in the cell region. A peripheral circuit is formed in a peripheral region in the semiconductor substrate. An inter layer dielectric(20) is deposited on the entire surface of the resultant structure. A spin coating oxide layer(22) is formed on the resultant structure. A dry etching process is carried out at the resultant structure for partially removing the inter layer dielectric in the cell region and the spin coating oxide layer in the peripheral region.