发明名称 Microcomputer and test method therefore
摘要 When a test mode signal is rendered active by a signal given from an external terminal, a CPU reads and runs various self-testing programs stored in a ROM. When any of the test programs comes to a process of testing a security circuit, a security test signal is rendered active and when a predetermined address is accessed then, a selector is switched to a register side by the output signal of an AND circuit of a test circuit. An illegitimate instruction, for example, is set in the register and is given to the CPU. Whether the security circuit has failure is determined by checking if an illegitimate access detection signal is output when the CPU executes the illegitimate instruction.
申请公布号 US2004111655(A1) 申请公布日期 2004.06.10
申请号 US20030688897 申请日期 2003.10.21
申请人 WATANABE MITSUHIRO 发明人 WATANABE MITSUHIRO
分类号 G01R31/28;G01R31/317;G06F11/22;G06F12/14;G06F15/78;G06F21/06;G06F21/24;G06K19/07;G11C29/00;(IPC1-7):G11C29/00 主分类号 G01R31/28
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