APPARATUS AND METHOD FOR SCHEDULING INSTRUCTION EXECUTION IN FUNCTIONAL UNITS WITH ISSUE LOCK MECHANISM

摘要

A functional unit (24) of a processor may be configured to operate on instructions as either a single, wide functional unit (24) or as multiple, independent narrower units (24A, 24B). For example, an execution unit (24) may be scheduled to execute an instruction as a single double-wide execution unit (24) or as two independently schedulable single-wide execution units (24A, 24B). Functional unit portions (24A, 24B) may be independently schedulable for execution of instructions operating on a first data type (e.g. SISD instructions). For single-wide instructions, functional unit portions may be scheduled independently. An issue lock mechanism (40) may lock functional unit portions together so that they form a single multi-wide functional unit. For certain multi-wide instructions (e.g. certain SIMD instructions), an instruction operating on a multi-wide or vector data type may be scheduled so that the full multi-wide operation is performed concurrently by functional unit portions (24A, 24B) locked together as a one wide functional unit (24).