发明名称 Method for making a metal-insulator-metal (mim) capacitor and metal resistor for a copper back-end-of-line (beol) technology
摘要 A method for making concurrently metal-insulator-metal (MIM) capacitors and a metal resistors in a Cu damascene back-end-of-line process is achieved. The method forms a Cu capacitor bottom metal plate (20A) using a dual-damascene process. A Si 3 N 4 or SiC is deposited to form a capacitor dielectric layer (22) on the Cu bottom plate. A metal layer (24) having an upper etch-stop layer is deposited and patterned to form concurrently capacitor top plates and metal resistors. The patterning is terminated in the capacitor dielectric layer to prevent Cu particle contamination. An insulating layer is deposited and via holes are etched to the capacitor top plates and the metal resistors using the upper etch-stop layer to prevent overetching and damage. The method provides a MIM capacitor using only one additional photoresist mask while improving process yield.
申请公布号 EP1427022(A2) 申请公布日期 2004.06.09
申请号 EP20030368106 申请日期 2003.12.02
申请人 CHARTERED SEMICONDUCTOR MANUFACTURING PTE LTD. 发明人 NG, CHIT HWEI;LI, JIAN XUN;CHEW, KOK WAI;TJOA, TJIN TJIN;CHAW SING HO;CHU, SHAO FU SANFORD
分类号 H01L21/02;H01L21/768;H01L21/822;H01L23/522;H01L27/04;H01L27/06 主分类号 H01L21/02
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