发明名称 |
Phase-locked loop with automatic frequency tuning |
摘要 |
A PLL frequency synthesizer able to automatically set an appropriate operating mode of the voltage controlled oscillator is provided. The voltage controlled oscillator is operable in a plurality of operating modes each defining a different operating frequency range of the voltage controlled oscillator. The appropriate operating mode is selected based on an error signal detected by a phase/frequency detector of the PLL frequency synthesizer. A window comparator is used for switching to adjacent operating modes if the error signal exceeds or falls below predefined upper and lower error voltage limits.
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申请公布号 |
US6747519(B2) |
申请公布日期 |
2004.06.08 |
申请号 |
US20030361086 |
申请日期 |
2003.02.07 |
申请人 |
ADVANCED MICRO DEVICES, INC. |
发明人 |
JAEHNE ROLF;KLUGE WOLFRAM;RIEDEL THORSTEN |
分类号 |
H03L7/099;H03L7/10;(IPC1-7):H03L7/08 |
主分类号 |
H03L7/099 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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