发明名称 High speed, wide bandwidth phase locked loop
摘要 A PLL may include a voltage regulator for providing a regulated voltage to one or more PLL components (e.g. a charge pump, a voltage controlled oscillator, etc.). The PLL components may be noise sensitive components, and the regulated voltage may reduce noise received from the power supply. Additionally, a level shifter may be coupled between the PLL components and a phase/frequency detector. The level shifter may be supplied by the regulated voltage from the voltage detector. In another implementation, a PLL may include a programmable charge pump and a programmable loop filter. For example, the reference current to the charge pump may be changed, thus changing the rate at which the charge pump can change an output voltage (the control voltage to a voltage controlled oscillator in the PLL). The loop filter components may be changed to change the frequency ranges filtered by the loop filter.
申请公布号 US6747497(B2) 申请公布日期 2004.06.08
申请号 US20020191218 申请日期 2002.07.09
申请人 BROADCOM CORPORATION 发明人 INGINO, JR. JOSEPH M
分类号 G05F3/26;G05F3/30;H03K3/03;H03K17/22;H03L7/089;H03L7/093;H03L7/099;H03L7/18;(IPC1-7):H03L7/06 主分类号 G05F3/26
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