发明名称 PLL FREQUENCY SYNTHESIZER FOR COMPENSATING VARIATION OF FREQUENCY GAIN OF VCO
摘要 PURPOSE: A PLL(Phase Locked Loop) frequency synthesizer for compensating a variation of a frequency gain of a VCO(Voltage Controlled Oscillator) is provided to maintain constantly a gain characteristic by detecting and compensating the variation of the frequency gain of the VCO. CONSTITUTION: A PLL frequency synthesizer for compensating a variation of a frequency gain of a VCO includes a phase comparator, a loop filter, a VCO, a frequency divider, a voltage detector, and a controller. The phase comparator(201) is used for comparing phases of the first and the second signals with each other and outputting a phase error signal. The loop filter(203) is used for filtering the phase error signal and outputting a control signal. The VCO(205) is used for controlling a frequency gain of an output signal of the loop filter. The frequency divider(207) is used for dividing a frequency of an output signal of the VCO according to a frequency division ratio and applying the second signal to the phase comparator. The voltage detector(209) is used for detecting a control voltage from the control signal of the VCO. The controller(211) is used for calculating a gain characteristic of the VCO by using the frequency division ratio and controlling gains of the phase comparator, the loop filter, and the VCO.
申请公布号 KR20040047435(A) 申请公布日期 2004.06.05
申请号 KR20020075657 申请日期 2002.11.30
申请人 INTEGRANT TECHNOLOGIES INC. 发明人 JUNG, MIN SU;KIM, BO EUN
分类号 H03D3/24;H03L7/089;H03L7/093;H03L7/099;H03L7/16;H03L7/18;(IPC1-7):H03L7/16 主分类号 H03D3/24
代理机构 代理人
主权项
地址