| 摘要 |
PROBLEM TO BE SOLVED: To always respond to an instruction for reading a home address at a high speed regardless of whether or not object data are stored in a cache memory, and to lower occurrence probability of errors. SOLUTION: In an FCU 2 having the cache memory 24 for controlling a DASD 3, a storage part of a defect alternation information table 27 is formed in a memory part of the FCU 2; all the defective track regions of the DASD 3 under control are read in turning power on or resetting it; whether or not a defect alternation link is created by a flag stored in a home address part of each track is determined; the result thereof is stored in the memory part as the information table 27; and when the read instruction of the home address is received, whether or not the information table 27 is valid is determined. COPYRIGHT: (C)2004,JPO
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