| 摘要 |
A focal plane architecture is provided which includes direct reading of an array of infrared detectors, each coupled to its own threshold circuit, the output of which is coupled to one input of a NAND gate, with the other input to the NAND gate being provided with a delayed threshold circuit output, thus to permit discrimination against ground clutter. This architecture results in an ultra fast frame read out, inherent discrimination of compact targets, photon counting at infrared wavelengths, and programmable range gating by exterior selection of array events within an expected return time for a transmitted pulse. |
