HIGH-RESOLUTION MULTI-PHASE CLOCK GENERATOR WITH AN ARRAY-STRUCTURED DELAY-LOCKING LOOP

摘要

The present invention relates to an array-structured high-resolution multi-phase clock generator of which time-resolution is shorter than a delay time of a delay cell. The present multi-phase clock generator can have arbitrary number of delay cells in a main delay-locking loop and in an auxiliary delay-locking loop. Moreover, the present multi-phase clock generator can generates 2 multi-phase clocks.