| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To increase program processing speed, to reduce chip area, and to reduce a program operation current. <P>SOLUTION: When at least verify-operation out of verify-operation and program operation is performed by comparing the prescribed main cell 23 selected by selecting a word line and a bit line in accordance with an input address with a value of current flowing a reference cell RefA1 or RefB1 by a sense amplifier S/A, this memory cell 23 is constituted of a series circuit of a selection transistor 23A and a nonvolatile variable resistive element 23B of which a resistance state is varied in accordance with applied voltage, voltage applied to a word line of the memory cell 23 is set to the same voltage at the time of verify-operation and at the time of program-operation. <P>COPYRIGHT: (C)2004,JPO</p> |
