A MULTI-LEVEL CONTROLLER SYSTEM

摘要

A leveled system architecture (100) of figure 5 includes multiple level processors and/or controllers that control each other and ultimately the system components. The host level controller (56) includes a host processor, the level-1 controller (52) includes the master controller, the level-2 controller (54) includes four controllers (54a, 54b, 54c and 54d) and the level-3 controller includes one or more controllers that interface between t he level-2 controllers and the system components. The motors, pumps, and the valves are controlled by the level-3 controllers, which are programmed in C and typically are not changeable the state records, which a processor engine er accesses to control the operation of the second and the level-2 controllers (52, 54), wherein the system executes a process by identifying a set of stat es to be executed, issuing state commands that need to be issued to execute the current state in the set of states.