发明名称 Semiconductor integrated circuit device and production method thereof
摘要 A refresh characteristic of a DRAM memory cell is improved and the performance of a MISFET formed in the periphery thereof and constituting a logic circuit is improved. Each gate electrode in a memory cell area is formed of p type polycrystalline silicon, and a cap insulating film on each gate electrode and a sidewall film on the sidewall thereof are formed of a silicon oxide film. A polycrystalline silicon film formed on the gate electrodes and between the gate electrodes is polished by a CMP method, and thereby contact electrodes are formed. Also, sidewall films each composed of a laminated film of the silicon oxide film and the polycrystalline silicon film are formed on the sidewall of the gate electrodes in the logic circuit area, and these films are used as a mask to form semiconductor areas. As a result, it is possible to reduce the boron penetration and form contact electrodes in a self-alignment manner. In addition, the performance of the MISFET constituting the logic circuit can be improved.
申请公布号 US2004104416(A1) 申请公布日期 2004.06.03
申请号 US20030616355 申请日期 2003.07.10
申请人 HITACHI, LTD.;NEC ELECTRONICS CORPORATION;NEC CORPORATION 发明人 TAKAURA NORIKATSU;MATSUOKA HIDEYUKI;KIMURA SHINICHIRO;NAGAI RYO;YAMADA SATORU
分类号 H01L27/108;H01L21/336;H01L21/60;H01L21/768;H01L21/8238;H01L21/8242;H01L21/8246;H01L27/115;H01L29/49;(IPC1-7):H01L21/823;H01L29/94;H01L31/119;H01L31/113;H01L21/823 主分类号 H01L27/108
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