| 摘要 |
<P>PROBLEM TO BE SOLVED: To enable simultaneous reading and operating of the data, to increase the operating speed, and to decrease the costs by the reduction of computing elements. <P>SOLUTION: Each bit of 8-bit data is stored in eight memory cells ML of each unit UN of a memory cell array 110 in advance. A capacitor C of the eight memory cells ML has capacitance corresponding to the weight of each bit of the 8-bit data. At least two units UN, namely a plurality word lines WL regarding at least two data, are activated simultaneously. As a result, on each bit line BL, the accumulation charge of the capacitor C of a plurality of memory cells ML connected to the plurality of word lines WL regarding at least two activated data is connected each. A voltage signal of a value corresponding to an obtained total amount of charge is converted to a digital signal by an A/D convertor on the bit line BL. The digital signal corresponds to the addition result of the data stored in at least two units UN. <P>COPYRIGHT: (C)2004,JPO |
