发明名称 SEMICONDUCTOR TESTING DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor testing device capable of a test with an irregular test pattern by adding a simple constitution to a semiconductor testing device for testing with a regular test pattern. SOLUTION: A driver board 16 outputs an algorithmic pattern 41 constituted of the regular test pattern corresponding to a semiconductor device to be tested. A control circuit 23 of a relay board 17 inputs the algorithmic pattern 41 from the driver board 16, and determines whether the algorithmic pattern 41 is coincident with a prescribed pattern set beforehand. When determined to be coincident, the control circuit 23 transmits a random pattern 40 read out from a vector memory 22 toward the semiconductor device (logic product) to be tested. COPYRIGHT: (C)2004,JPO
申请公布号 JP2004157002(A) 申请公布日期 2004.06.03
申请号 JP20020322560 申请日期 2002.11.06
申请人 NEC ELECTRONICS CORP 发明人 OSHIRO SHOKICHI
分类号 G01R31/30;G01R31/28;G01R31/3183;G11C29/00;G11C29/10;(IPC1-7):G01R31/30;G01R31/318 主分类号 G01R31/30
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