发明名称 APPARATUS AND METHOD FOR USING TRAINING SEQUENCES TO ESTIMATE TIMING ERROR IN A DIGITAL SIGNAL RECEIVER
摘要 <p>An apparatus and method is disclosed for estimating timing error in a digital signal receiver from a difference between an arrival time of a first training sequence and an arrival time of a second training sequence in the digital signal receiver. Time domain representations of the timing sequence data are converted into frequency domain representations and used to calculate a complex cross power spectrum. The timing error is obtained by determining an average phase of the complex cross power spectrum. The timing error is then used to calculate an accurate value for the clock rate of the digital signal transmitter.</p>
申请公布号 KR20040045921(A) 申请公布日期 2004.06.02
申请号 KR20047006086 申请日期 2002.10.17
申请人 发明人
分类号 H04L7/00;H04L7/02;H04L7/027;H04L7/04;H04N5/04;H04N5/44 主分类号 H04L7/00
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