发明名称 PREFETCHING OF PIXEL-DATA USING A LINE BUFFER APPROACH WITH VARIABLE SAMPLING PATTERNS
摘要 A pixel-data processing circuit delivers a fixed number of pixels to a video processing stage using an irregular sampling pattern that is defined by a variably-definable sampling window. In one example embodiment directed to processing an input stream of pixels corresponding to an array of video pixels, the window size is selected from one of various options for sampling subsets of the array as a two-dimensional window that spans the pixels in the array. A sampling-window is used such that the window size is a multiple of the sampling-window size and the sampling-window size defines the fixed number of pixels. The processing includes concurrently moving pixel data from the input stream into a first set of line buffers with the pixels stored in the first set of line buffers including pixels for the established window size, prefetching the stored pixels from the first set of line buffers into a second set of line buffers, the second set of line buffers being sufficiently long to store at least the pixels corresponding to the established sampling-window size, and fetching the fixed number of pixels from the second set of line buffers. In various applications, in addition to flexibility, the present invention realizes enhanced throughput.
申请公布号 KR20040045926(A) 申请公布日期 2004.06.02
申请号 KR20047006102 申请日期 2002.10.25
申请人 发明人
分类号 G06F3/14;G06T1/20;G09G;H04N7/12;H04N7/26;H04N7/50 主分类号 G06F3/14
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