| 摘要 |
A non-volatile semiconductor memory device has a memory cell array region in which a plurality of memory cells, each of the memory cells having first and second MONOS memory cells, are arranged. A control gate drive section has a plurality of control gate drivers. A plurality of switching elements are provided at connections between a plurality of main bit lines and a plurality of sub bit lines. Each of the sub bit lines has a projecting portion at one end. The projecting portion has a large-width region having a width greater than the width of each of the sub bit lines in a region in which the memory cells are formed.
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