发明名称 |
METHOD FOR CHECKING POWER-OFF FUNCTION OF DESIGNED CIRCUIT |
摘要 |
PURPOSE: A method for checking a power-off function of a designed circuit is provided to reduce a period for designing a circuit by verifying an operating state of a power-off block. CONSTITUTION: A control signal, a control gate, and information of a power supply block are set up(S10). An operating state of a power-off block is determined by checking a state of the control gate when a path tracking control signal is applied to a control gate according to the control signal(S30-S50). A path tracking operation, an operation for inverting the control signal, and an error decision process are respectively performed according to a buffer, an inverter, a logic element when the path tracking control signal is applied to the remaining circuits except for the control gate(S80,S90). An error output is reported if the state of error is decided(S110).
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申请公布号 |
KR20040045243(A) |
申请公布日期 |
2004.06.01 |
申请号 |
KR20020073675 |
申请日期 |
2002.11.25 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
LEE, BYEONG HYEON;LEE, JAE YEONG |
分类号 |
H03K17/16;(IPC1-7):H03K17/16 |
主分类号 |
H03K17/16 |
代理机构 |
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主权项 |
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地址 |
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