发明名称
摘要 PROBLEM TO BE SOLVED: To enhance the reliability of an integrated circuit by a method wherein an interconnection layer is not separated in a wire bonding operation and a circuit inspection. SOLUTION: In an integrated circuit, a circuit chip and an interconnection layer 107 which comprises pad parts W1, W2, W3 by which the circuit chip and other external components are wire-bonded are formed on a semiinsulating semiconductor substrate 104. In the integrated circuit, the interconnection layer at the pad parts is bonded to a semiconductor active layer 110 on the semiconductor substrate 104 via a reinforcement layer 109 which has been reacted with the semiconductor substrate by an alloying treatment.
申请公布号 JP3532007(B2) 申请公布日期 2004.05.31
申请号 JP19950225766 申请日期 1995.08.09
申请人 发明人
分类号 H01L23/12;H01L21/28;H01L21/60;H01L23/14 主分类号 H01L23/12
代理机构 代理人
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