| 摘要 |
<P>PROBLEM TO BE SOLVED: To make a buffer memory (conventionally required) unnecessary in a data transfer interface, to easily apply a clock generator as an operating clock in the system, and to enhance system performance in the case of using a spread spectrum clock for operations of the respective circuit parts in a system. <P>SOLUTION: A phase of a reference clock generated by an oscillator 1 is controlled by a variable delay circuit 2. The variable delay circuit 2 changes setting of control voltage by every clock period by a delay setting circuit 11 and performs phase modulation of the reference clock. Spread spectrum is performed by setting for varying period of an output modulation clock. In addition, the delay setting circuit 11 guarantees constant synchronicity in a spread spectrum clock by detecting an output state (clock edge) of a delay element of the variable delay circuit 2, and by restricting phase difference between the reference clock and the modulation clock to a prescribed range (for example, a half of reference clock period). <P>COPYRIGHT: (C)2004,JPO |
