Multiplexer circuit for converting parallel data into serial data at high speed and synchronizing the serial data with a clock signal

摘要

A multiplexer circuit converts parallel data into serial data synchronized with an internal clock signal, and the multiplexer circuit has a logic circuit, a load circuit, and a plurality of switching elements. The logic circuit processes the internal clock signal and the parallel data. The load circuit and the plurality of switching elements are connected in series between a first power source line and a second power source line. Each of the switching elements is controlled in accordance with an output of the logic circuit.