| 摘要 |
A thin film transistor array and driving circuit structure fabricated on a substrate. The structure comprises a plurality of scanning lines, a plurality of signaling lines, a plurality of thin film transistors, a plurality of pixel electrodes, a plurality of storage capacitors and a plurality of CMOS transistors. Each thin film transistor includes a polysilicon layer, a source/drain terminal, an N+ doped thin film, a gate and a gate insulation layer. The polysilicon layer is formed on the substrate and the source/drain terminal is formed over the polysilicon layer. The N+ doped thin film is positioned between the polysilicon layer and the source/drain terminal. The gate is formed over the polysilicon layer and the gate insulation layer is positioned between the polysilicon layer and the gate. |
