发明名称 |
VIA-SEA LAYOUT IN INTEGRATED CIRCUITS |
摘要 |
An integrated circuit interconnect is provided having a dielectric layer disposed between a wide top metal line and a wide bottom metal line. A via-sea in the dielectric layer connects the wide top and wide bottom metal lines by means of a first via having a width, a second via having a width and spaced more than two widths away and less than four widths away from the first via. |
申请公布号 |
SG103907(A1) |
申请公布日期 |
2004.05.26 |
申请号 |
SG20030000038 |
申请日期 |
2003.01.06 |
申请人 |
CHARTERED SEMICONDUCTOR MANUFACTURING LTD. |
发明人 |
JAE SOO PARK;CHIVUKULA SUBRAMANYAM;THOW PHOCK CHUA;HONG LIM LEE |
分类号 |
H01L23/522;(IPC1-7):H01L29/80;H01L31/112;H01L31/028 |
主分类号 |
H01L23/522 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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