Clock recovery circuit and phase detecting method therefor

摘要

A clock recovery circuit provides a reference clock signal and a plurality of clock pulses with phases different from the reference clock signal, and has an edge detecting circuit for detecting positions of edges of inputted serial random data. A detected edge selecting circuit selects whether the edges of the inputted serial random data are rising edges or falling edges of the reference clock signal. An edge position correcting circuit assures that the number of the selected edges is equal to the number of the edges of the inputted serial random data. Phase frequency detectors output pulses of a pulse width in proportion to the phase difference between the inputted serial random data and the reference clock signal.