发明名称 Semiconductor memory device capable of performing burn-in test at high speed
摘要 A control circuit generates burn-in test signals and a signal on the basis of an address for causing transition of a semiconductor memory device to a burn-in test mode to output the signals to a predecoder. The predecoder outputs signals for selecting even-numbered word lines and signals for causing odd-numbered word lines to be in a non-selected state on the basis of the burn-in test signals at H level and further outputs signals for causing even-numbered word lines to be in a non-selected state and signals for selecting odd-numbered word lines on the basis of the burn-in test signals at H level. As a result, stresses can be effectively applied by the burn-in test.
申请公布号 US6741510(B2) 申请公布日期 2004.05.25
申请号 US20020223326 申请日期 2002.08.20
申请人 RENESAS TECHNOLOGY CORP. 发明人 OHBAYASHI SHIGEKI;KASHIHARA YOJI;YOKOYAMA TAKAHIRO
分类号 G01R31/30;G01R31/28;G11C11/401;G11C11/413;G11C29/06;G11C29/18;H01L21/8244;H01L27/11;(IPC1-7):G11C7/00 主分类号 G01R31/30
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