| 摘要 |
First wirings are disposed along a straight line in one row or one column of memory cell arrays. A second wiring is disposed above the first wirings and transmits a signal from one end of the second wiring to the other end thereof. Contact plugs connect the first wirings and the second wiring to each other. The first wirings are connected to a plurality of successive memory cells among all the memory cells in the row or column to which the first wirings belong. In case such an LSI is manufactured and defect analysis is made to thereby form an FBM, it is decided that the contact plugs connecting the first wirings to the second wiring are disconnected when a plurality of successive memory cells in one row or one column. Thus, a plurality of defects are expressed by the use of different categories.
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