发明名称
摘要 <p>PROBLEM TO BE SOLVED: To provide a clock distributor that distributes clock signals of a plurality of kinds of clock frequencies from a clock generating panel to an interface panel, conducts EMI countermeasures and synchronizes the phases of the clock signals having a plurality of kinds of the clock frequencies. SOLUTION: The clock generating panel 1 includes phase synchronization oscillators 5-8 that generate clock signals with different clock frequencies, distributes a clock signal of at least one kind of clock frequency as a basic clock signal 8KCLK as it is, and distributes the clock signals of the clock frequencies of the other kinds as sine wave clock signals of the frequency twice that of the basic clock signal. The interface panel 2 samples the sine wave clock signals phase-synchronously with the buildup timing of the basic clock signal 8KCLK and frequency-divides the sampled clock signal to convert it into a rectangular wave clock signal.</p>
申请公布号 JP3531103(B2) 申请公布日期 2004.05.24
申请号 JP20000097720 申请日期 2000.03.31
申请人 发明人
分类号 G06F1/04;G06F1/10;H03K5/15;H03M1/12;H04L7/00;(IPC1-7):H04L7/00 主分类号 G06F1/04
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