| 摘要 |
In a level shifter, first (M1) and second (M2) PMOS transistors are connected in series between first and second power sources for supplying first high level (VDD) and low level (LVSS) voltages, respectively, and a capacitor (C1) is formed between a contact point of the first (M1) and second (M2) transistors and the second transistor's gate. A third PMOS transistor (M3) is diode-connected and connected between the first and second transistors' gates. When a second low level voltage is input to the first transistor's gate, a second high level voltage is output to the contact point according to an on resistance ratio of the first (M1) and second (M2) transistors. When a first high level voltage is input to the first transistor's gate, the second transistor (M2) is bootstrapped according to the voltage charged to the capacitor (C1) so that a first low level voltage is substantially output to the contact point. Since the level shifter outputs voltages substantially corresponding to voltages (VDD,LVSS) which the first and second power sources supply respectively, a range of the output voltage may be extended. <IMAGE>
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