CHIP STACK WITH INTERMEDIATE CAVITY

摘要

The invention relates to a method for connecting a connecting surface of a first silicon wafer [WA1] with a connecting surface of a second silicon wafer [WA2] so as to form an insulated cavity after assembly, at least one of the two silicon wafers [WA] including at least one functional area [DA] intended to be within the cavity. The method according to the invention includes a step [PLTS] of depositing alloy soldering bumps [PLTC] on the connecting surface of the first silicon wafer [WA1], said bumps [PLTC] being separated from one another by an even distance which is sufficiently small to cause joinings during the assembly of the two silicon wafers. Said step [PLTS] of depositing the soldering bumps [PLTC] is carried out during the step of depositing the soldering bumps [PLTE] intended for the electrical contacts. The method includes a reflux soldering step [RFX] for assembling the two silicon wafers by melting of the alloy soldering bumps. Application: Protection of semiconductor elements sensitive to the external conditions.