| 摘要 |
PURPOSE: A method for forming a metal line of a semiconductor device is provided to secure the overlay margin of a via for the metal line in the formation of a via by increasing the upper surface area of the metal line using a spacer. CONSTITUTION: The first interlayer dielectric(110) is formed on a silicon substrate(100). A lower metal line(120) is formed in the first interlayer dielectric. The upper portion of the interlayer dielectric is partially etched by using a down-flow process. A metal layer is deposited on the entire surface of the resultant structure. A spacer(135) is formed at both sidewalls of the lower metal line by carrying out a blank etch-back process on the metal layer for exposing the predetermined upper surface of the first interlayer dielectric. Preferably, a predetermined gas mixed with CxFy, O2, and Ar is used for the down-flow process.
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