发明名称 Systems and methods to read, optimize, and verify byte codes for a multiplatform jit
摘要 A byte code reader provides verification while optimizing and creating an internal SSA form to allow efficient machine code generation. Many functions are combined in one component honoring the difficult time constraints of just-in-time translation. This reader is engineered for retargeting and thus expedites the implementation of a JIT for any platform. The reader takes two single passes over the byte codes: a first pass that builds a flow graph using any set of rules for node creation, and maps definitions from the byte codes onto the flow graph nodes, and a second pass that translates whatever is in the byte codes into optimized machine code (or a traditional compiler intermediate form) with an embedded SSA graph. Global verification and global optimization are implemented while reading. Two data structures and a main program loop are provided. The data structures are used to allow the creation of a flow graph, and an exception handling (EH) graph.
申请公布号 US2004098710(A1) 申请公布日期 2004.05.20
申请号 US20020294362 申请日期 2002.11.14
申请人 RADIGAN JIM 发明人 RADIGAN JIM
分类号 G06F9/445;G06F9/45;(IPC1-7):G06F9/45 主分类号 G06F9/445
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