| 摘要 |
PROBLEM TO BE SOLVED: To improve system efficiency by leaving the processing data of a processor having a high priority as a system in a cache. SOLUTION: This device comprises a priority setting table 107 for setting the priority according to the identification number and processing content of each processor in a device having a plurality of processors using a common cache, a cache memory 103 for writing the information related to the priority of the processor loaded to the cache as processor information corresponding to data, and a priority comparator 108 for comparing the processor information written in the cache memory with the priority of the priority setting table. The write of the cache is performed according to the comparison of the priority of the mishit processor with the priority of the priority comparator. COPYRIGHT: (C)2004,JPO
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