Clock generating circuit including memory for regulating delay amount of variable delay circuit in ring oscillator

摘要

A rewritable memory (120) stores a plurality of regulation amounts (increase amounts and decrease amounts) related to values of signals (240b and 240c) (to give information about a difference amount between an oscillation frequency of a ring oscillator (110) and a desired frequency). A control circuit (131) selects one of the regulation amounts from the memory (120) corresponding to the values of the signals (240b and 240c) and increases or decreases a value of a counter (132) by the regulation amount thus selected. The oscillation frequency is regulated by the value of the counter (132).