发明名称 Method for forming metal wiring layer of semiconductor device
摘要 A method for forming a metal wiring layer of a semiconductor device, where a first layer having a recess region is formed on a semiconductor substrate. A second layer is formed on inner walls of the recess region and on an upper portion of the first layer. A third layer is formed on the second layer so as to have a smaller third layer thickness on the inner walls of the recess region than on the upper portion of the first layer. A fourth layer is then formed on the-third layer, providing a metal wiring layer with improved step coverage.
申请公布号 US2004094838(A1) 申请公布日期 2004.05.20
申请号 US20030365385 申请日期 2003.02.13
申请人 SEO JUNG-HUN;CHOI GIL-HEYUN;KIM BYUNG-HEE;YUN JOO-YOUNG;PARK SEONG-GEON 发明人 SEO JUNG-HUN;CHOI GIL-HEYUN;KIM BYUNG-HEE;YUN JOO-YOUNG;PARK SEONG-GEON
分类号 H01L21/3205;H01L21/285;H01L21/768;H01L23/522;H01L23/532;(IPC1-7):H01L23/48;H01L21/476;H01L29/40 主分类号 H01L21/3205
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