| 摘要 |
PROBLEM TO BE SOLVED: To provide a direct memory access (DMA) device that controls transfer of data between devices sharing a bus independently of a CPU, a bus arbitration controller that determines a default bus master from a plurality of bus masters in dependence on bus transfer requests, and a control method therefor. SOLUTION: The DMA device has data buffers 31 of, for example, 16 bytes mounted on input/output devices 14 (14-1/14-2), and data buffers 32 of, for example, 16 bytes mounted on DMA controllers 12 (12-1/12-2). A data size in a source device (the input/output device 14 in this example) and a data size in a destination device (a main memory 13 in this example) are independently controllable, so that the application of different memory access controls to the respective source device and destination device effectively uses a bus band. COPYRIGHT: (C)2004,JPO
|
