Apparatus and method of generating clock signal

摘要

A clock signal generating apparatus has a phase-lock loop circuitry. A phase comparator compares, in phase, an input digital signal with a clock signal that has already been generated. A differential amplifier amplifies the difference between the output of the phase comparator and a reference voltage. A clock signal generator generates a clock signal to be supplied to the phase comparator, based on the amplified difference. An accumulator accumulates an amount of errors of the input digital signal. A voltage generator generates a reference voltage to be supplied to the differential amplifier within a range from a predetermined minimum voltage to a predetermined maximum voltage. The level of the generated reference voltage is adjusted according to the output of the accumulator. The operating point of the clock signal generator is controlled by the level-adjusted reference voltage.