发明名称 Semiconductor integrated circuit device with clock distribution configuration therein
摘要 A semiconductor integrated circuit device includes internal circuits divided into blocks that are controlled block by block for activation. Each internal circuit receives a clock signal from a clock distribution network of a block including that internal circuit. The clock signal is supplied to the clock distribution network by buses of a tree structure and a clock drive control gate. The clock drive control gate stops, in response to an enable signal for controlling activation of internal circuits block by block, the clock signal from being supplied, when internal circuits of a corresponding block are inactivated.
申请公布号 US6737903(B2) 申请公布日期 2004.05.18
申请号 US20020252799 申请日期 2002.09.24
申请人 RENESAS TECHNOLOGY CORP. 发明人 SUZUKI HIROAKI
分类号 G11C11/407;G06F1/10;G11C11/401;H01L21/82;H01L21/822;H01L27/02;H01L27/04;(IPC1-7):G06F1/04;H03K3/00 主分类号 G11C11/407
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