| 摘要 |
An image processing system for use in semiconductor wafer inspection comprises a multiplicity of self-contained image processors for independently performing image cross-correlation and defect detection. The system may also comprise an image normalization engine for performing image brightness and contrast normalization. The self-contained image processors and image normalization engine access image data from a memory array; the array is fed data from a multiplicity of imaging modules operating in parallel. The memory array is configured to allow simultaneous access for data input, normalization, and cross-correlation and defect detection. Multiple image processing systems can be configured in parallel as a single image processing computer, all sending defect data to a common display module.
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