| 发明名称 |
Three-dimensional memory array and method of fabrication |
| 摘要 |
A multi-level memory array is described employing rail-stacks. The rail-stacks include a conductor and semiconductor layers. The rail-stacks are generally separated by an insulating layer used to form antifuses. In one embodiment, one-half the diode is located in one rail-stack and the other half in the other rail-stack.
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| 申请公布号 |
US2004089917(A1) |
申请公布日期 |
2004.05.13 |
| 申请号 |
US20030689187 |
申请日期 |
2003.10.20 |
| 申请人 |
KNALL N. JOHAN;JOHNSON MARK |
发明人 |
KNALL N. JOHAN;JOHNSON MARK |
| 分类号 |
G11C16/04;H01L21/77;H01L21/8246;H01L21/84;H01L27/06;H01L27/102;H01L27/115;(IPC1-7):H01L29/00 |
主分类号 |
G11C16/04 |
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